收藏本站

AD9985A
2-WIRE SERIAL REGISTER MAP
The AD9985A is initialized and controlled by a set of registers that determine the operating modes. An external controller is used to write
and read the control registers through the two-line serial interface port.
Table 10. Control Register Map
Write and
Hexadecimal
Read or
Default
Register
Address
0x00
0x01 1
Read-Only
RO
R/W
Bits
7:0
7:0
Value
01101001
Name
Chip Revision
PLL Div MSB
Function
An 8-bit register that represents the silicon revision level.
This register is for Bits [11:4] of the PLL divider. Greater values mean
the PLL operates at a faster rate. This register should be loaded first
whenever a change is needed. This will give the PLL more time to lock.
0x02 1
R/W
7:4
1101****
PLL Div LSB
Bits [7:4] of this word are written to the LSBs [3:0] of the PLL divider
word.
0x03
R/W
7:3
01******
Bits [7:6] VCO Range. Selects VCO frequency range. (See the PLL
description.)
**001***
Bits [5:3] Charge Pump Current. Varies the current that drives the
low-pass filter. (See the PLL description.)
0x04
R/W
7:3
10000***
Phase Adjust
ADC Clock Phase Adjustment. Larger values mean more delay.
(1 LSB = T/32)
0x05
R/W
7:0
10000000
Clamp
Places the clamp signal an integer number of clock periods after the
Placement
trailing edge of the Hsync signal.
0x06
R/W
7:0
10000000
Clamp
Number of clock periods that the clamp signal is actively clamping.
Duration
0x07
R/W
7:0
00100000
Hsync Output
Sets the number of pixel clocks that HSOUT will remain active.
Pulse Width
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7:0
7:0
7:0
7:1
7:1
7:1
7:0
10000000
10000000
10000000
1000000*
1000000*
1000000*
0*******
Red Gain
Green Gain
Blue Gain
Red Offset
Green Offset
Blue Offset
Sync Control
Controls the ADC input range (contrast) of each respective channel.
Greater values give less contrast.
Controls dc offset (brightness) of each respective channel. Greater
values decrease brightness.
Bit 7—Hsync Polarity Override. (Logic 0 = polarity determined by
chip, Logic 1 = polarity set by Bit 6 in Register 0x0E.)
*1******
**0*****
***0****
****0***
*****0**
******0*
*******0
Bit 6—Hsync Input Polarity. Indicates polarity of incoming Hsync
signal to the PLL. (Logic 0 = active low, Logic 1 = active high.)
Bit 5—Hsync Output Polarity. (Logic 0 = logic high sync,
Logic 1 = logic low sync.)
Bit 4—Active Hsync Override. If set to Logic 1, the user can select the
Hsync to be used via Bit 3. If set to Logic 0, the active interface is
selected via Bit 6 in Register 0x14.
Bit 3—Active Hsync Select. Logic 0 selects Hsync as the active sync.
Logic 1 selects sync-on-green as the active sync. Note that the
indicated Hsync is used only if Bit 4 is set to Logic 1 or if both syncs
are active. (Bits 1, 7 = Logic 1 in Register 0x14.)
Bit 2—Vsync Output Invert. (Logic 1 = no invert, Logic 0 = invert.)
Bit 1—Active Vsync Override. If set to Logic 1, the user can select the
Vsync to be used via Bit 0. If set to Logic 0, the active interface is
selected via Bit 3 in Register 0x14.
Bit 0—Active Vsync Select. Logic 0 selects raw Vsync as the output
Vsync. Logic 1 selects sync separated Vsync as the output Vsync.
Note that the indicated Vsync is used only if Bit 1 is set to Logic 1.
0x0F
R/W
7:1
0*******
Bit 7—Clamp Function. Chooses between Hsync for clamp signal or
another external signal to be used for clamping. (Logic 0 = Hsync,
Logic 1 = Clamp.)
Rev. 0 | Page 17 of 32
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
ADA4850-2YCP-EBZ BOARD EVAL FOR ADA4850-2YCP
ADA4899-1YCP-EBZ BOARD EVAL FOR ADA4899-1YCP
ADA4937-1YCP-EBZ BOARD EVAL FOR ADA4937-1YCP
ADA4938-2YCP-EBZ BOARD EVAL FOR ADA4938-2YCP
ADF37A-KG-TAXB3-R CONN D-SUB FEMALE 37POS R/A .318
ADG465BRM-REEL7 IC 1CH PROTECTOR 8MSOP
ADG467BR IC CHAN PROTECTOR OCTAL 18-SOIC
ADISUSBZ KIT EVAL ADIS W/SOFTWARE USB
相关代理商/技术参数
AD9985AABSTZ-110 制造商:Analog Devices 功能描述:ANALOG INTERFACE FOR FLAT PANEL DISPLAYS - Bulk
AD9985AAKSTZ-110 制造商:Analog Devices 功能描述:ANALOG INTERFACE FOR FLAT PANEL DISPLAYS - Bulk
AD9985AAKSTZ-140 制造商:Analog Devices 功能描述:ANALOG INTERFACE FOR FLAT PANEL DISPLAYS - Bulk
AD9985ABSTZ-110 功能描述:IC INTERFACE 8BIT 110MSPS 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1
AD9985AKSTZ-110 功能描述:IC INTERFACE 8BIT 110MSPS 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1
AD9985AKSTZ-140 功能描述:IC INTERFACE 8BIT 140MSPS 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1
AD9985BST-110 制造商:Analog Devices 功能描述:110 MSPS/140 MSPS ANLG INTRFC FOR FLAT PNL DISPLAYS 80LQFP - Bulk
AD9985BSTZ-110 功能描述:IC INTERFACE 8BIT 110MSPS 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1